Microsoft Corporation is actively seeking an exceptional professional to join our organization as a Senior Silicon Design Verification Engineer within the Silicon Engineering division. Positioned at the core of Microsoft’s technological innovation, this role offers direct involvement in mission-critical engineering initiatives, planetary-scale cloud services, and next-generation product architectures.

Role Overview & Strategic Impact

As a Senior Silicon Design Verification Engineer based in Mountain View, California, United States, you will play an integral role in architecting, engineering, and delivering transformative technology solutions. Operating within Microsoft’s Silicon Engineering practice, your efforts will directly shape the scalability, performance, and security of software systems and platforms trusted by billions of users worldwide.

Microsoft’s enduring mission is to empower every person and every organization on the planet to achieve more. Team members thrive within an inclusive culture grounded in a growth mindset, cross-team empathy, and uncompromising customer focus. In this position, you will collaborate with industry-leading engineers, researchers, and product leaders to solve complex technical problems at unprecedented scale.

Technical Domain: Custom Silicon & Specialized Hardware Architecture

Microsoft’s Silicon Engineering organization designs purpose-built custom chips—including the Azure Maia AI accelerator, Azure Cobalt CPU, and advanced security processors—optimized specifically for cloud and frontier AI workloads. Specialists across signal integrity, power integrity, and ASIC verification collaborate closely with system architects and foundry partners. Their objective is maximizing compute density, optimizing power envelope efficiency, and delivering deterministic performance across planetary datacenter fleets.

Professionals in this specialization combine strong computer science fundamentals with practical, real-world systems engineering. Whether delivering distributed microservices, designing custom silicon interconnects, managing physical datacenter infrastructure, or scaling AI-powered customer workflows, you will operate within a mature engineering ecosystem supported by Microsoft’s global technical community.

Key Responsibilities & Scope of Work

In this capacity, your daily priorities and core technical contributions will center on the following key operational deliverables:

• Develop C and C++ based test content, low-level drivers, and custom firmware at the subsystem and SoC levels, including self-checking tests that run on embedded processors.
• Extend the compile and build flow to support custom firmware-style tests.
• Serve as a technical owner for the team’s FPGA prototyping platforms (such as HAPS or Xilinx): create board images and bit files. Design additional custom FPGA RTL for protocol interfaces and feature enablement. Release stable platforms to the firmware team and keep them working as the design evolves.
• Develop and extend custom python tooling to interface with the FPGA platform.
• Debug FPGA and post-silicon issues using tools such as JTAG debuggers, logic analyzers, oscilloscopes, and multimeters
• Drive post-silicon bring-up and validation in the lab: run the validation suites on first silicon, meet bring-up exit criteria on schedule, and debug platform issues such as JTAG failures, UART connectivity, and boot failures alongside the design, firmware, hardware, and security teams.
• Root-cause failing post-silicon tests to closure, collecting and analyzing scan dumps for low-level issues such as boot ROM and built-in self-test bugs, coordinating cross-team debug, and delivering fixes such as handling fatal errors, correcting driver access violations, and reconciling registers modified by boot firmware.
• Maintain rigorous code quality, comprehensive automated test coverage, and security compliance throughout all phases of software delivery.
• Participate actively in technical design reviews, operational post-mortems, and architectural discussions across global engineering cohorts.

Candidate Profile & Experience Requirements

Candidates for the Senior Silicon Design Verification Engineer position are evaluated based on their practical experience, technical depth, and demonstrated track record of problem-solving:

• Professional Background: Minimum of 1 years (12 months) of verified experience directly relevant to silicon engineering or related technical specializations.
• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
• OR Master’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience
• OR Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience
• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.
• Proficiency in Python, or a similar scripting language such as Perl or Ruby, for test automation, build flows, and log or data parsing.
• Technical Competence: Demonstrated mastery of programming environments, distributed systems, modern cloud infrastructure, or specialized analytical methodologies relevant to the domain.
• Cross-Functional Leadership: Strong written and verbal communication skills, with an established ability to articulate complex technical architectures clearly to engineering peers and executive stakeholders.
• Culture & Values: Demonstrated alignment with Microsoft’s core values of respect, integrity, and accountability, alongside a proactive dedication to diversity and inclusion.

Work Environment, Workplace Schedule & Location Structure

This position is designated with an official location in Mountain View, California, United States. Work arrangements for this role are structured as Onsite Model with Hybrid Work Flexibility (Mountain View, California). Microsoft provides modern, accessible work environments equipped with state-of-the-art developer tooling, ergonomic facilities, and collaborative hybrid infrastructure.

Compensation, Total Rewards & Comprehensive Benefits

Microsoft offers a comprehensive, highly competitive total rewards framework designed to support employees’ personal, professional, and financial well-being:

• Legally Disclosed Base Salary Range: USD $119,800 – USD $234,700 per annum across typical US geographic zones (regional geographic differentials apply for high-cost zones such as the San Francisco Bay Area and New York City metropolitan areas).
• Incentive & Equity Rewards: Eligibility for annual performance-based cash bonuses and Microsoft restricted stock units (RSUs).
• Comprehensive Healthcare: Premium medical, dental, and vision coverage, including mental health support programs and wellness reimbursements.
• Retirement & Financial Security: Robust 401(k) / national retirement savings plans with generous company matching contributions, alongside financial planning resources.
• Time Off & Work-Life Harmony: Generous paid time off, comprehensive parental leave programs, public holiday allowances, and caregiver leave support.
• Growth & Learning: Unlimited access to Microsoft Learn, internal technical conferences, tuition assistance, and structured career mobility pathways across worldwide business units.

Application Process & Requisition Reference

This position is actively open and monitored by Microsoft Talent Acquisition. In alignment with corporate hiring policies, applications are accepted on an ongoing basis with no rigid pre-determined closing deadline until a qualified candidate is formally selected (Open Until Filled).

To submit your application, select the Apply Now button on this listing to navigate directly to the official Microsoft Careers requisition portal. When submitting your candidacy, reference Requisition ID 200048759. Ensure your resume and supporting documentation highlight your relevant technical deliverables, system achievements, and professional qualifications.